A. Field of the Invention
This invention relates to MOS buffer circuits in general and to a MOS level shifter/driver circuit in particular.
B. Description of the Prior Art
In MOS circuitry there is often a need for controlling one signal with another, such as controlling the output of a circuit with an input signal or for buffering a signal. In such circuits it is often desirable or necessary to have the output voltage greater than the input signal voltage but less than the source of potential used to power the circuit.
For example, on a MOS chip containing thousands of elements the transformation and manipulation of digital data is orchestrated by timing signals generated by a clock. Therefore, all logic transitions must take place within a critical time interval as determined by the clock period. Since a MOS device is essentially a capacitive load, the speed with which the device may be charged or discharged becomes critical. Therefore, it is often necessary to provide a signal having a particular magnitude to ensure a desired switching speed. In this case, the magnitude of this signal is greater than another available signal but less than the magnitude of the source of potential employed to power the circuit or circuits on a chip.
One of the well-known prior art techniques for generating a voltage in a MOS circuit which is greater than the potential applied to the circuit is bootstrapping. In order to accomplish bootstrapping, a bootstrapping circuit is employed. The bootstrapping circuit contains a capacitive load which must be charged. Further, the use of a bootstrap circuit requires a sequence of timing signals.
As will be seen, the present circuit eliminates the need for bootstrapping and the attendant use of timing signals.